Fintronic Super Finsim 9.2.4 LINUX64

性愛  忍者亂太郎

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商品名稱： Fintronic Super Finsim 9.2.4 LINUX64


商品分類： Linux系統專用軟體


商品類型： 線性FinSim Verilog仿真器軟體


語系版本： 英文正式版


運行平台： LINUX (以官方網站為準)


更新日期： 2007-09-24




破解說明:



1. Install application, make sure to toggle the NO DONGLE option.

2. copy our supplied license.dat from /Lz0 to program dir(ie ...\FinSim\bin\cl)

3. You MUST add the full path to the LM_LICENSE_FILE environment variable AND

create FINTRON_LICENSE_FILE environment variable also with full path to license file(ie ...\FinSim\bin\cl),

also same with FINTRONIC env. variable. all three must contain full path including license.dat filename!

內容說明:



Super-FinSim是頂級的線性FinSim Verilog仿真器，從1993年放出第一款FinSim Verilog

仿真器至今，FinSim Verilog已經引入了許多嶄新的功能：混合編譯和解釋型仿真，仿真

工廠可以讓工程師管理數以百計的同步仿真、分離和增量編譯、高性能保存和重啟、直接

集成C代碼，無須PLI。

英文說明:



Super-FinSim is the top of the line FinSim Verilog

simulator. Ever since the first FinSim Verilog simulator has

been sold in 1993, the FinSim Verilog simulators have

introduced many new features that have become state of the

art in Verilog simulation: mixed Compiled and Interpreted

simulation, simulation Farm that allows one engineer to

manage hundreds of simultaneous simulations, separate and

incremental compilation, high performance save and restart,

direct integration with C code without the need for PLI,

etc. Super FinSim supports the entire Verilog standard IEEE

1364-1995 and many features of IEEE 1364-2001, which are

listed under Support for Verilog 2001. It's support includes

SDF, VCD, PLI, as well as excellent integration with other

tools such as a tight integration via API (for better

performance than PLI integration) with Debussy and Verdi

debug environments from Novas Software, and excellent PLI

integrations with Specman from Verisity and Vera from

Synopsys for test benches, MMAV from Denali for memory

models, Undertow from Veritools for debug environment,

HDLScore from Summit Design for code coverage, and

others. In the DA Solution Limited `96 benchmark, the

predecessor of Super-FinSim, FinSim-ECS, was rated the

fastest Verilog simulator. FinSim was rated the fastest

PC-based Verilog simulator in the ASIC & EDA benchmark.